1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device and, more specifically, to a method which is employed in forming an element insulating portion by filling with an insulating material a narrow trench having an opening width in submicrons and provided in a semiconductor substrate and a broad trench having an opening width larger than 1 .mu.m and provided in the same, and which is suitable particularly for isolation in a high density device applied to a dynamic RAM (DRAM).
2. Description of the Prior Art
Generally, in the process for manufacturing a high density device, a semiconductor substrate is provided with a narrow trench having an opening width K in submicrons and a broad trench having an opening width J larger than 1 .mu.m for isolation between elements. Although the narrow trench is used as an isolation portion and the broad trench is used as a scribe line for isolation chips, they must be filled with a SiO.sub.2 film by a chemical vapor deposition method (CVD).
In substantially filling the trenches, a BOX (Buried Oxide) method as shown in FIG. 5 is employed.
As shown in FIGS. 5 (a), (b) and (c), an SiO.sub.2 film 4 is deposited by CVD over the entire surface of a Si substrate 1 which is provided with a narrow trench 2 having an opening width K of 1 .mu.m and a broad trench 3 having an opening width J of several .mu.m so that these trenches 2, 3 are filled with the SiO.sub.2 film 4.
Then, a first resist layer 5 is formed on the SiO.sub.2 film 4 deposited on the broad trench 3, and thereafter a second resist layer 6 is formed over the entire surface of the SiO.sub.2 film 4 and the first resist layer 5 thereon (see FIG. 5 (d)).
After that, the first and second resist layers 5, 6 and the SiO.sub.2 film 4 are etched back by an anisotropic dry etching method until the uppermost surface 1a of the Si substrate 1 is exposed and the surface of the semiconductor substrate 1 is flattened (see FIG. 5 (e)).
Thus, the narrow trench 2 and the broad trench 3 are filled with the SiO.sub.2 film 4.
Then, the Si substrate 1 shown in FIG. 5 (e) is subjected to wet etching with HF bath. At this time, the SiO.sub.2 film 4 in the narrow trench 2 is provided with a concave portion 7, or so called "nest", locally depressed along a contact face 2d in the middle portion of the narrow trench 2, of all contact faces 2a, 2b, 2c and 2d which are sequentially defined with growth of the film 4 as shown in FIGS. 5 (a), (b) and (c) (see FIG. 5).
Thus, the surface of the substrate 1 lacks flatness. Accordingly, in subsequent device manufacturing steps, as some conductive material attaches to the concave portion 7, it is difficult to remove such conductive material from the narrow trench 2 when the substrate 1 is subjected to etching or washing. As a result, leakage between devices and short-circuiting between gates of the devices is likely to occur.
Taking the foregoing into consideration, the present invention can eliminate the disadvantages of manufacturing a semiconductor device by a BOX method.